AD9517-3:  12-Output Clock Generator with Integrated 2.0 GHz VCO

The AD9517-3* provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.75 GHz to 2.25 GHz. Optionally, ...More

AD9517-3:  12-Output Clock Generator with Integrated 2.0 GHz VCO

Product Description

The AD9517-3* provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.75 GHz to 2.25 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz may be used.

The AD9517-3 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.

The AD9517-3 features four LVPECL outputs (in two pairs); four LVDS outputs (in two pairs); and eight CMOS outputs (two per LVDS output). The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.

Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.

The AD9517-3 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5.5 V. A separate LVPECL power supply can be from 2.375 V to 3.6 V.

The AD9517-3 is specified for operation over the standard industrial range of −40°C to +85°C.

*AD9517 is used throughout to refer to all the members of the AD9517 family. However, when AD9517-3 is used, it is referring to that specific member of the AD9517 family.

Applications

  • Low jitter, low phase noise clock distribution
  • Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
  • High performance wireless transceivers
  • High performance instrumentation
  • Broadband infrastructure
  • ATE

    • Features

    • Eight 250 MHz CMOS outputs (two per LVDS output)
    • Manual synchronization of outputs as needed

    Low phase noise, phase-locked loop

    • On-chip VCO tunes from 1.75 GHz to 2.25 GHz
    • External VCO/VCXO to 2.4 GHz optional
    • 1 differential or 2 single-ended reference inputs
    • Reference monitoring capability
    • Auto and manual reference switchover/holdover modes
    • Auto recover from holdover
    • Accepts references to 250 MHz
    • Programmable delays in path to PFD
    • Digital or analog lock detect, selectable
    • 2 pairs of 1.6 GHz LVPECL outputs
      Each pair shares 1 to 32 dividers with coarse phase delay
      Additive output jitter 225 fS rms
      Channel-to-channel skew paired outputs <10 ps
    • 2 pairs of 800 MHz LVDS clock outputs
      Each pair shares two cascaded 1 to 32 dividers with coarse phase delay
      Additive output jitter 275 fS rms
      Fine delay adjust (ΔT) on each LVDS output
    • Automatic synchronization of all outputs on power-up
    • Serial control port
    • 48-lead LFCSP

    Diagrams

    AD9517-3 Diagram
    Functional Block Diagram for AD9517-3

    Specifications

    Primary Clock Function Clean Up,Distribution,Generation
    +Supply Voltage (V) 3.3V
    Max Input Frequency 2400MHz
    # of Outputs 12
    Max f-out (MHz) 2250MHz
    I/O Interface Serial
    Package 48-LFCSP
    Output Logic CMOS,LVDS,LVPECL
    Product Description Multi-Output Clock Generator

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    Part# Product Description +Supply Voltage (V) # of Inputs # of Outputs On-Chip VCO or DCO Max f-out (MHz) Output Logic Random Jitter (ps-RMS) Package Price* (1000-4999)
    AD9510 Multi-Output Clock Generator 3.3 1 8 No 1200 CMOS, LVDS, LVPECL 0.225 64-LFCSP $12.09
    AD9511 Multi-Output Clock Generator 3.3 1 5 No 1200 CMOS, LVDS, LVPECL 0.225 48-LFCSP $10.07
    AD9512 Clock Divider 3.3 1 5 No 1200 CMOS, LVDS, LVPECL 0.225 48-LFCSP $9.06
    AD9513 Clock Divider 3.3 1 3 No 800 CMOS, LVDS 0.3 32-LFCSP $6.02
    AD9514 Clock Divider 3.3 1 3 No 1600 CMOS, LVDS, LVPECL 0.225 32-LFCSP $6.02
    AD9515 Clock Divider 3.3 1 2 No 1600 CMOS, LVDS, LVPECL 0.225 32-LFCSP $4.81
    AD9516-0 Multi-Output Clock Generator 3.3 2 14 Yes 2950 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-1 Multi-Output Clock Generator 3.3 2 14 Yes 2650 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-2 Multi-Output Clock Generator 3.3 2 14 Yes 2335 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-3 Multi-Output Clock Generator 3.3 2 14 Yes 2250 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-4 Multi-Output Clock Generator 3.3 2 14 Yes 1800 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9517-0 Multi-Output Clock Generator 3.3 2 12 Yes 2950 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
    AD9517-1 Multi-Output Clock Generator 3.3 2 12 Yes 2650 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
    AD9517-2 Multi-Output Clock Generator 3.3 2 12 Yes 2335 CMOS, LVDS, LVPECL 0.4