AD9549:  Dual Input Network Clock Generator/Synchronizer

The AD9549 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9549 generates an output clock, synchronized to one of two external input ...More

AD9549:  Dual Input Network Clock Generator/Synchronizer

Product Description

The AD9549 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9549 generates an output clock, synchronized to one of two external input references. The external references may contain significant time jitter, also specified as phase noise. Using a digitally controlled loop and holdover circuitry, the AD9549 continues to generate a clean (low jitter), valid output clock during a loss of reference condition, even when both references have failed.

The AD9549 operates over an industrial temperature range of −40°C to +85°C.

Applications

  • Network synchronization
  • Reference clock jitter cleanup
  • SONET/SDH clocks up to OC-192, including FEC
  • Stratum 3/3E reference clocks
  • Wireless base stations, controllers
  • Cable infrastructure
  • Data communications

    • Data Sheet, Rev. 0, 8/07

    Features

    • Flexible reference inputs
    • Input frequencies: 8 kHz to 750 MHz
    • Two reference inputs
    • Loss of reference indicators
    • Auto and manual holdover modes
    • Auto and manual switchover modes
    • Smooth A-to-B phase transition on outputs
    • Excellent stability in holdover mode
    • Programmable 16 + 1-bit input divider, R
    • Differential HSTL clock output
    • Output frequencies to 750 MHz
    • Low jitter clock doubler for frequencies >
      400 MHz

    Diagrams

    AD9549 Diagram
    Functional Block Diagram for AD9549

    Specifications

    Primary Clock Function Clean Up,Generation,Synchronization
    +Supply Voltage (V) 3.3V
    Max Input Frequency 750MHz
    # of Outputs 2
    Max f-out (MHz) 750MHz
    I/O Interface Serial
    Package 64-LFCSP
    Output Logic CMOS,HSTL
    Product Description Clock Generator Synchronizer

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    Part# Product Description +Supply Voltage (V) # of Inputs # of Outputs On-Chip VCO or DCO Max f-out (MHz) Output Logic Random Jitter (ps-RMS) Package Price* (1000-4999)
    AD9510 Multi-Output Clock Generator 3.3 1 8 No 1200 CMOS, LVDS, LVPECL 0.225 64-LFCSP $12.09
    AD9511 Multi-Output Clock Generator 3.3 1 5 No 1200 CMOS, LVDS, LVPECL 0.225 48-LFCSP $10.07
    AD9512 Clock Divider 3.3 1 5 No 1200 CMOS, LVDS, LVPECL 0.225 48-LFCSP $9.06
    AD9513 Clock Divider 3.3 1 3 No 800 CMOS, LVDS 0.3 32-LFCSP $6.02
    AD9514 Clock Divider 3.3 1 3 No 1600 CMOS, LVDS, LVPECL 0.225 32-LFCSP $6.02
    AD9515 Clock Divider 3.3 1 2 No 1600 CMOS, LVDS, LVPECL 0.225 32-LFCSP $4.81
    AD9516-0 Multi-Output Clock Generator 3.3 2 14 Yes 2950 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-1 Multi-Output Clock Generator 3.3 2 14 Yes 2650 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-2 Multi-Output Clock Generator 3.3 2 14 Yes 2335 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-3 Multi-Output Clock Generator 3.3 2 14 Yes 2250 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9516-4 Multi-Output Clock Generator 3.3 2 14 Yes 1800 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
    AD9517-0 Multi-Output Clock Generator 3.3 2 12 Yes 2950 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
    AD9517-1 Multi-Output Clock Generator 3.3 2 12 Yes 2650 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
    AD9517-2 Multi-Output Clock Generator 3.3 2 12 Yes 2335 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
    AD9517-3 Multi-Output Clock Generator 3.3 2 12 Yes