- Low phase noise, phase-locked loop
On-chip VCO tunes from 2.30 GHz to 2.65 GHz
External VCO/VCXO to 2.4 GHz optional
1 differential or 2 single-ended reference inputs
Reference monitoring capability
Auto and manual reference switchover/
holdover modes
Autorecover from holdover
Accepts references to 250 MHz
Programmable delays in path to PFD
Digital or analog lock detect, selectable
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- 3 pairs of 1.6 GHz LVPECL outputs
Each pair shares 1 to 32 dividers with coarse
phase delay
Additive output jitter 225 fs rms
Channel-to-channel skew paired outputs <10 ps
- Automatic synchronization of all outputs on
power-up
- Manual synchronization of outputs as needed
- Serial control port
- 48-lead LFCSP
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