ADCMP608:  Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator

The ADCMP608 is a fast comparator fabricated on XFCB2, an Analog Devices, Inc. proprietary process. This comparator is exceptionally versatile and easy to use. Features include an input range from ...More

ADCMP608:  Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator

Product Description

The ADCMP608 is a fast comparator fabricated on XFCB2, an Analog Devices, Inc. proprietary process. This comparator is exceptionally versatile and easy to use. Features include an input range from VEE − 0.2 V to VCC + 0.2 V, low noise, TTL-/CMOS-compatible output drivers, and shutdown inputs. The device offers 40 ns propagation delays driving a 15 pF load with 10 mV overdrive on 500 μA typical supply current.

A flexible power supply scheme allows the device to operate with a single +2.5 V positive supply and a −0.2 V to + 2.7 V input signal range up to a +5.5 V positive supply with a −0.2 V to +5.7 V input signal range.

The TTL-/CMOS-compatible output stage is designed to drive up to 15 pF with full rated timing specifications and to degrade in a graceful and linear fashion as additional capacitance is added. The input stage of the comparator offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded.

The ADCMP608 is available in a tiny 6-lead SC70 package with a single-ended output and a shutdown pin.

Applications

  • High speed instrumentation
  • Clock and data signal restoration
  • Logic level shifting or translation
  • High speed line receivers
  • Threshold detection
  • Peak and zero-crossing detectors
  • High speed trigger circuitry
  • Pulse-width modulators
  • Current-/voltage-controlled oscillators

    • Data Sheet, Rev. 0, 4/07

    Features

    • Fully specified rail to rail at VCC = 2.5 V to
      5.5 V
    • Input common-mode voltage from −0.2 V to
      VCC + 0.2 V
    • Low glitch CMOS-/TTL-compatible output stage
    • 40 ns propagation delay
    • Low power: 1 mW at 2.5 V
    • Shutdown pin
    • Power supply rejection > 60 dB
    • −40°C to +125°C operation

    Diagrams

    ADCMP608 Diagram
    Functional Block Diagram for ADCMP608

    Specifications

    Logic Output TTL/CMOS
    # Per Pkg 1
    Prop Delay (ns)typ 30ns
    Voltage Supply (V) 2.5 to 5.5
    Supply Current (max) 500µA
    Min Pulse Width 35ns
    Package 6-Lead SC-70
    Shutdown X

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