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- 4 or 6 wideband digital upconverter channels
- VersaCREST™ crest reduction engine reduces demands on external power amplifiers
- One 20-bit complex input port (I/Q interleaved), shared among 4 or 6 processing channels
- Two 18-bit output ports for parallel I and Q, or interleaved I and Q on a single port
- All-pass phase equalizer filters (meets cdma2000 requirements)
- Programmable RAM coefficient FIR filters (RCF) with resampling
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- FIR interpolating filters and Fifth-order interpolating CIC filter
- Full complex NCO, 32-bit tuning resolution (fine), worst spur better than - 105 dBc
- Complex FIR filter for frequency equalization
- Power monitoring and output Automatic Gain Control
- 16-bit/8-bit MicroPort or SPI/SPORT compatible serial port
- 3.3 V I/O and 1.8 V core supplies
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| Design Tools |
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AD6633 IBIS Model |
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Impedance Matching Tutorial
This tutorial examines the Smith Chart and its application to transmission line impedance matching.
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