AD6635:  Four-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)

The AD6635 is a multi-mode eight channel digital Receive Signal Processor (RSP) capable of processing up to four WCDMA channels. Each channel consists of four cascaded signal-processing elements: a ...More

AD6635:  Four-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)

Product Description

The AD6635 is a multi-mode eight channel digital Receive Signal Processor (RSP) capable of processing up to four WCDMA channels. Each channel consists of four cascaded signal-processing elements: a frequency translator, two CIC decimating filters, and a programmable coefficient-decimating filter. Each input port has input level threshold detection circuitry and an AGC controller for accommodating large dynamic ranges or situations where gain ranging converters are used. Quad 16-bit parallel output ports accomodate high data rate WBCDMA applications. On-chip interpolating half band filters can also be used to further increase the output rate. In addition, each parallel output port has a digital AGC for output data scaling. Link port outputs are provided to enable glueless interfaces to Analog Devices’ TigerSHARC™ DSP core.

The AD6635 is part of Analog Devices’ SoftCell™ Multi-carrier transceiver chipset designed for compatibility with Analog Devices family of high sample rate IF sampling ADCs (AD6640/AD6644 12 & 14 bit). The SoftCell™ receiver comprises a digital receiver capable of digitizing an entire spectrum of carriers and digitally selecting the carrier of interest for tuning and channel selection. This architecture eliminates redundant radios in wireless base station applications.

Features

  • 80 MSPS Wide Band Inputs (14 linear
    bit plus 3 RSSI)
  • Processes 4 WCDMA channels (UMTS or cdma2000 1x)
    or 8 GSM/EDGE, IS136 Channels
  • Eight Independent Digital Receivers
    in a Single Package
  • Four 16-Bit Parallel Output Ports and
    Four 8-Bit Link Ports
  • Programmable Digital AGC Loops with
    96d B Range
  • Digital Re-sampling for non-Integer
    Decimation Rates
  • Programmable Decimating FIR Filters
  • Four Interpolating Half Band Filters
  • Programmable Attenuator Control for
    Clip Prevention and External Gain
    Ranging via Level Indicator
  • Flexible Control for Multi-Carrier
    and Phased Array
  • 3.3 Volt I/O, 2.5 Volt CMOS Core
  • User Configurable Built in Self Test
    (BIST) Capability

Diagrams

AD6635 Diagram
Functional Block Diagram for AD6635

Specifications

Digital TX/RX RX
Input Sampling (MSPS) 80MSPS

Explore Other Products

Download this Selection Table
(pdf, 22,589 bytes)

Last Updated: 9/2007

DDCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6620 65

1 Channel

(main and diversity)

1 Channel

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

1 Channel
AD6624 80

4 Channels

2 samples per symbol

2 Channels

2 samples per chip

1 Channel with FPGA for serial to parallel conversion

2 samples per chip

1 Channel with FPGA for serial to parallel conversion

2 samples per chip

4 Channels

1 sample per chip

AD6624A 100

2 Channels with FPGA for serial to parallel conversion

2 samples per chip

AD6634 80

4 Channels

2 samples per symbol

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

4 Channels

1 sample per chip

AD6635 80

8 Channels

2 samples per symbol

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

8 Channels

1 sample per chip

AD6636 150

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip

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DUCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6622

75

4 Channels

Serial output

2 Channels

Serial output

1 Channel

Serial output

1 Channel

Serial output

4 Channels

Serial output

AD6623 104

4 Channels

Modulate using I/Q symbols

Direct modulation xPSK

Mode switching

Power Ramping

2 Channels (real output)

Serial output

Includes IIR filter for phase pre-distortion

2 Channels (real output)

Serial output

2 Channels (real output)

Serial output

4 Channels

Serial output

Power Ramping

Direct modulation

AD6633 125

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

Includes IIR filter for phase pre-distortion

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

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Integrated ADC/DDC Receivers
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6652 65

4 Channels

2 samples per symbol

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

4 Channels

1 sample per chip

AD6653 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

AD6654 92.16

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip

AD6655 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

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QDUCs
Generic Part # Master Clock (MSPS min) Power Supply Voltage (Vnom) Power Dissipation (mW max) Description
AD9856 200 Single (+3) 1590 200 MHz Quadrature Digital Upconverter With 12-Bit Data Path
AD9857 200 Single (3.3 V) 2029 200 MSPS Quadrature Digital Upconverter with 14-bit Data Path
AD9957 1000 Multi (1.8, 3.3) 1800 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC
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Pricing, Packaging & Availability

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*The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.
**Sample availability may be better than production availability. Please enter samples iinto your cart to check sample availability.

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