AD5724:  Complete, Quad, 12-Bit, Serial Input, Unipolar/Bipolar Voltage Output DACs

The AD5724/AD5734/AD5754 are quad, 12-/14-/16-bit, serial input, voltage output digital-to-analog converters. They operate from single-supply voltages from +4.5 V up to +16.5 V or dual- supply ...More

AD5724:  Complete, Quad, 12-Bit, Serial Input, Unipolar/Bipolar Voltage Output DACs

Product Description

The AD5724/AD5734/AD5754 are quad, 12-/14-/16-bit, serial input, voltage output digital-to-analog converters. They operate from single-supply voltages from +4.5 V up to +16.5 V or dual- supply voltages from ±4.5 V up to ±16.5 V. Nominal full-scale output range is software-selectable from +5 V, +10 V, +10.8 V, ±5 V, ±10 V, or ±10.8 V. Integrated output amplifiers, reference buffers, and proprietary power-up/power-down control circuitry are also provided.

The parts offer guaranteed monotonicity, integral nonlinearity (INL) of ±16 LSB maximum, low noise, and 10 μs maximum settling time.

The AD5724/AD5734/AD5754 use a serial interface that operates at clock rates up to 30 MHz and are compatible with DSP and microcontroller interface standards. Double buffering allows the simultaneous updating of all DACs. The input coding is user-selectable twos complement or offset binary for a bipolar output (depending on the state of Pin BIN/2sComp), and straight binary for a unipolar output. The asynchronous clear function clears all DAC registers to a user-selectable zero-scale or midscale output. The parts are available in a 24-lead TSSOP and offer guaranteed specifications over the −40°C to +85°C industrial temperature range.

Applications

  • Industrial automation
  • Closed-loop servo control, process control
  • Automotive test and measurement
  • Programmable logic controllers
  • Data Sheet, Rev. 0, 8/08

    Features

    • Complete, quad, 12-/14-/16-bit digital-to-analog converter (DAC)
    • Operates from single/dual supplies
    • Software programmable output range
      +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V
    • INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum
    • Total unadjusted error (TUE): 0.1% FSR maximum
    • Settling time: 10 μs maximum
    • Integrated reference buffers
    • See Data Sheet for Additional Information

    Diagrams

    AD5724 Diagram
    Functional Block Diagram for AD5724

    技术指标

    Resolution (Bits) 12bit
    DAC Update Rate 100kSPS
    DAC Settling Time 8.5µs
    # DAC Outputs 4
    DAC Type Voltage Out
    DAC Input Format Ser,SPI
    Output FSR (Bip 10.8V),(Bip 10V),(Bip 5V),(Uni 10.8V),(Uni 10V),(Uni 5V)
    Ref Int/Ext Ext
    Supply Vnom (+12An, +3 to +5Dig),(+15An, +3 to +5Dig),(+5An, +3 to +5Dig),(± 5An, +3 to +5Dig),(±12An, +3 to +5Dig),(±15An, +3 to +5Dig)
    Pwr Diss (Max) 310mW
    Package SOP

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    订阅新产品资料 More
    Part# Res (bits) Update Rate Settling Time # Outputs
    AD5024 12 125KSPS 8µs 4
    AD5624 12 287KSPS 3µs 4
    AD5624R 12 287KSPS 3µs 4
    AD5625 12 333KSPS 3µs 4
    AD5625R 12 333KSPS 3µs 4
    AD5724 12 100KSPS 8.5µs 4
    DAC8412 12 167KSPS 6µs 4