AD6650: Diversity IF-to-Baseband GSM/EDGE Narrow-Band Receiver
The AD6650 is a diversity intermediate frequency-to-baseband(IF-to-baseband) receiver for GSM/EDGE. This narrow-band receiver consists of an integrated DVGA, IF-to-baseband I/Q demodulators, low-pass ...More
AD6650: Diversity IF-to-Baseband GSM/EDGE Narrow-Band Receiver
Product Description
The AD6650 is a diversity intermediate frequency-to-baseband(IF-to-baseband) receiver for GSM/EDGE. This narrow-band receiver consists of an integrated DVGA, IF-to-baseband I/Q demodulators, low-pass filtering, and a dual wideband ADC. The chip can accommodate IF input from 70 MHz to 260 MHz. The receiver architecture is designed such that only one external surface acoustic wave (SAW) filter for main and one for diversity are required in the entire receive signal path to meet GSM/EDGE blocking requirements.
Digital decimation and filtering circuitry provided on-chip remove unwanted signals and noise outside the channel of interest. Programmable RAM coefficient filters allow antialiasing, matched filtering, and static equalization functions to be combined in a single cost-effective filter. The output of the channel filters is provided to the user via serial output I/Q data streams.
Applications
- PHS or GSM/EDGE single carrier, diversity receivers
- Microcell and picocell systems Wireless local loop
- Smart antenna systems
- Software radios In-building wireless telephony
Data Sheet, Rev. A, 1/07
- 产品数据手册 Rev A, 01/2007 (pdf 1053kB)
- (关于数据手册)
Features
- 116 dB dynamic range
- Digital VGA
- I/Q demodulators
- Active low-pass filters
- Dual wideband ADC
- Programmable decimation and channel filters
- VCO and phase-locked loop circuitry
- Serial data output ports
Diagrams
- Enlarge
- 原理图符号和PCB封装
Functional Block Diagram for AD6650
Diversity IF-to-Baseband GSM/EDGE Narrow-Band Receiver
Functional Block Diagram for AD6650
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Download this Selection Table (pdf, 22,589 bytes) |
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Last Updated: 9/2007 |
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| Generic Part # | MSPS | GSM, EDGE/GPRS | CDMA2000 | UMTS | TDS-CDMA | |
|---|---|---|---|---|---|---|
| 1x | 3x | |||||
| AD6620 | 65 | 1 Channel (main and diversity) |
1 Channel 2 samples per chip |
1 Channel with FPGA to finish filtering 2 samples per chip |
1 Channel with FPGA to finish filtering 2 samples per chip |
1 Channel |
| AD6624 | 80 | 4 Channels 2 samples per symbol |
2 Channels 2 samples per chip |
1 Channel with FPGA for serial to parallel conversion 2 samples per chip |
1 Channel with FPGA for serial to parallel conversion 2 samples per chip |
4 Channels 1 sample per chip |
| AD6624A | 100 | 2 Channels with FPGA for serial to parallel conversion 2 samples per chip |
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| AD6634 | 80 | 4 Channels 2 samples per symbol |
2 Channels 4 samples per chip Digital AGC |
2 Channels 4 samples per chip Digital AGC |
2 Channels 4 samples per chip Digital AGC |
4 Channels 1 sample per chip |
| AD6635 | 80 | 8 Channels 2 samples per symbol |
4 Channels 4 samples per chip Digital AGC |
4 Channels 4 samples per chip Digital AGC |
4 Channels 4 samples per chip Digital AGC |
8 Channels 1 sample per chip |
| AD6636 | 150 | 6 Channels 4 / 8 samples per symbol |
6 Channels 4 samples per chip Digital AGC |
6 Channels 4 samples per chip Digital AGC |
6 Channels 4 samples per chip Digital AGC |
6 Channels 1 / 2 / 4 samples per chip |
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| Generic Part # | MSPS | GSM, EDGE/GPRS | CDMA2000 | UMTS | TDS-CDMA | |
|---|---|---|---|---|---|---|
| 1x | 3x | |||||
| AD6622 | 75 |
4 Channels Serial output |
2 Channels Serial output |
1 Channel Serial output |
1 Channel Serial output |
4 Channels Serial output |
| AD6623 | 104 | 4 Channels Modulate using I/Q symbols Direct modulation xPSK Mode switching Power Ramping |
2 Channels (real output) Serial output Includes IIR filter for phase pre-distortion |
2 Channels (real output) Serial output |
2 Channels (real output) Serial output |
4 Channels Serial output Power Ramping Direct modulation |
| AD6633 | 125 | 6 Channels Modulated I/Q data VersaCREST™ Crest Reduction Engine IF/RF compensation using complex filter |
6 Channels Modulated I/Q data VersaCREST™ Crest Reduction Engine Includes IIR filter for phase pre-distortion |
6 Channels Modulated I/Q data VersaCREST™ Crest Reduction Engine IF/RF compensation using complex filter |
6 Channels Modulated I/Q data VersaCREST™ Crest Reduction Engine IF/RF compensation using complex filter |
6 Channels Modulated I/Q data VersaCREST™ Crest Reduction Engine IF/RF compensation using complex filter |
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| Generic Part # | MSPS | GSM, EDGE/GPRS | CDMA2000 | UMTS | TDS-CDMA | |
|---|---|---|---|---|---|---|
| 1x | 3x | |||||
| AD6652 | 65 | 4 Channels 2 samples per symbol |
2 Channels with some external filtering 4 samples per chip Digital AGC |
2 Channels with some external filtering 4 samples per chip Digital AGC |
2 Channels with some external filtering 4 samples per chip Digital AGC |
4 Channels 1 sample per chip |
| AD6653 | 150 | 2 x 6 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 12 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 6 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 4 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 12 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
| AD6654 | 92.16 | 6 Channels 4 / 8 samples per symbol |
6 Channels 4 samples per chip Digital AGC |
6 Channels 4 samples per chip Digital AGC |
6 Channels 4 samples per chip Digital AGC |
6 Channels 1 / 2 / 4 samples per chip |
| AD6655 | 150 | 2 x 6 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 12 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 6 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 4 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
2 x 12 Channels - external Channelization Filters Required Fast Level Detect and Power Monitor |
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| Generic Part # | Master Clock (MSPS min) | Power Supply Voltage (Vnom) | Power Dissipation (mW max) | Description |
|---|---|---|---|---|
| AD9856 | 200 | Single (+3) | 1590 | 200 MHz Quadrature Digital Upconverter With 12-Bit Data Path |
| AD9857 | 200 | Single (3.3 V) | 2029 | 200 MSPS Quadrature Digital Upconverter with 14-bit Data Path |
| AD9957 | 1000 | Multi (1.8, 3.3) | 1800 | 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC |
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AD6650 Model Options
| 产品型号 | 产品状态 | 封装 | Pins | 温度范围 | 报价* (1000 pcs.) |
Production** Availability |
ROHS Compliant | Samples Cart | Purchase Cart |
|---|---|---|---|---|---|---|---|---|---|
| AD6650ABC | Prodn | 121 ball CSPBGA (12x12mm) | 121 | Ind | $ 20.64 | - |
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Material Declaration |
联络ADI | Add To Cart |
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- 民用温度范围:0 ºC~+70 ºC
- 军用温度范围:-55ºC ~+125ºC
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- 汽车工作温度范围:-40 ℃~ +125 ℃
Sample availability may be better than production availability. Please enter samples into your cart to check sample availability.
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**Sample availability may be better than production availability. Please enter samples into your cart to check sample availability.

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