AD9861: 10-Bit Mixed-Signal Front-End (MxFE®)Processor
The AD9861 is a member of the MxFE® family, a group of integrated converters for the communications market. The AD9861 includes dual 10-bit Analog-to-Digital Converters (ADCs) and dual 10-bit ...More
AD9861: 10-Bit Mixed-Signal Front-End (MxFE®)Processor
Product Description
The AD9861 is a member of the MxFE® family, a group of integrated converters for the communications market. The AD9861 includes dual 10-bit Analog-to-Digital Converters (ADCs) and dual 10-bit Digital-to-Analog Converters (TxDAC® converters). Two speed grades are available, a -50 and -80. The -50 is optimized for ADC sampling of 50 MSPS and less, while the -80 is optimized for ADC sample rates between 50 MSPS and 80 MSPS. The dual TxDAC converters operate at speeds up to 200 MHz and includes a bypassable 2x or 4x interpolation filter. Three auxiliary converters are also available to provide required system level control voltages or monitor system signals. All devices are optimized for low power, small form factor and provide a cost effective solution for the broadband communication market.
The AD9861 uses a single input clock pin (CLKIN) to generate all system clocks. The ADCs and TxDAC Converters clock are generated within a timing generation block which utilizes user programmable options such as divide circuits, PLL multiplier and switches.
A Flexible bi-directional 20-bit I/O bus is used to accommodate a variety of custom digital back ends or open market DSPs. In half duplex systems, the interface supports 20-bit parallel transfers or 10-bit interleaved transfers. In Full duplex systems, the interface supports an interleaved 10-bit ADC bus and an interleaved 10-bit Tx bus. The flexible I/O bus reduces pin count and therefore required package size.
The AD9861 can use either mode pins or a serial programmable interface (SPI) to configure the interface bus, operate the ADC in a low power mode, configure the TxDAC converter interpolation rate, control the ADC power down and TxDAC power down. The SPI allows for more programmable options for both the TxDAC path (for example, coarse and fine gain control, offset control for channel matching) and ADC path (for example, internal duty cycle stabilizer, 2’s complement data format).
The AD9861 is packaged in a 64-pin lfCSP package (low profile, fine pitch chip scale package). The 64-pin lfCSP package footprint is only 9 mm by 9 mm and is less than 0.9 mm high fitting into tightly spaced applications such as PCMCIA cards.
Applications
- 产品数据手册 Rev 0, 11/2003 (pdf 1282kB)
- （关于数据手册）
Features
- Receive Path Includes Dual 10-Bit Analog-To-Digital Converters with Internal or External Reference, 50 And 80 MSPS Versions
- Transmit Path Includes Dual 10-Bit, 200 MSPS Digital-to-Analog Converters with 1x, 2x, Or 4x Interpolation and Programmable Gain Control
- Internal Clock Distribution Block Includes a Programmable Phase-Locked-Loop and Timing Generation Circuitry Allowing Single Reference Clock Operation
- 20-Bit Flexible I/O Data Interface Allow Various Interleaved or Non-Interleaved Data Transfers in Half-Duplex Mode and Interleaved Data Transfers in Full-Duplex Mode
- Configurable through SPI Compliant Port or MODE Selection Pins
- Independent Rx and Tx Powerdown
Control Pins - 64 Lead lfCSP Package
(9 mm x 9 mm Footprint) - 3 Configurable Auxiliary Converter Pins
Diagrams
- Enlarge
- 原理图符号和PCB封装
Functional Block Diagram for AD9861
10-Bit Mixed-Signal Front-End (MxFE®)Processor
Functional Block Diagram for AD9861
| Part# | RxTx Function | Channel BW MHz | IF or RF Range MHz | Primary Application | Supply V | Product Description | Price* (1000-4999) | Resolution (Bits) | # Chan | T-Put Rate |
|---|---|---|---|---|---|---|---|---|---|---|
| ADF9010 | Bband Quadrature CODEC | - | - | 900 MHz RFID readers | - | 900MHz ISM Band Analog RF Front End | - | - | 2 | - |
| AD9868 | Bband CODEC | - | - | Broadband Wireline, Home Networking | Multi(+3.3Anlg, +3.3Dig) | 10-Bit DAC/80 MSPS, 10-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | - | 10 | 1 | 80MSPS |
| AD9865 | Bband CODEC | 35 | DC-40 | Broadband Wireline, Home Networking | Single(+3.3) | 10-Bit DAC/80 MSPS, 10-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | $10.07 | 10 | 1 | 80MSPS |
| AD9869 | Bband CODEC | 54 | DC-40 | Broadband Wireline, Home Networking | Multi(+3.3Anlg, +3.3Dig), Single(+3.3) | 12-Bit DAC/80 MSPS, 12-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | $18.27 | 12 | 1 | 80MSPS |
| AD9866 | Bband CODEC | 35 | DC-40 | Broadband Wireline, Home Networking | Single(+3.3) | 12-Bit DAC/80 MSPS 12-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | $18.77 | 12 | 1 | 80MSPS |
| AD9863 | Bband Quadrature CODEC | 25/40 | DC-40 | Broadband Wireless | Single(+3), Single(+3.3) | Dual, 12-Bit DAC/12-Bit 50/80 MSPS ADC, Mixed-Signal Front-End Processor (MxFE) For Bband Apps | $21.68 | 12 | 2 | 50MSPS |
| AD9861-50 | Bband Quadrature CODEC | 25 | DC-40 | Broadband Wireless | Single(+3), Single(+3.3) | Dual 10-Bit DAC/Dual 50 MSPS ADC Mixed-Signal Front-End (MxFE) For Broadband Comms Apps | $10.84 | 10 | 2 | 50MSPS |
| AD9861-80 | Bband Quadrature CODEC | 40 | DC-40 | Broadband Wireless | Single(+3), Single(+3.3) | Dual 10-Bit DAC/Dual 80 MSPS ADC Mixed-Signal Front-End (MxFE) For Broadband Comms Apps | $10.84 | 10 | 2 | 80MSPS |
| AD9862 | Bband Quadrature CODEC | 32 | DC-100 | Broadband Wireless | Single(+3.3) | Dual 14-Bit DAC/Dual 12-Bit ADC Mixed Sig Front-End (MxFE) for Bband Comms, Rx&Tx PGA, Digital SSB | $30.11 | 12 | 2 | 64MSPS |
| AD9860 | Bband Quadrature CODEC | 32 | DC-100 | Broadband Wireless | Single(+3.3) | Dual 12-Bit DAC/Dual 10-Bit ADC Mixed Sig Front-End (MxFE) for Bband Comms, Rx&Tx PGA, Digital SSB | $13.90 | 10 | 2 | 64MSPS |
| AD6600 | IF-to-Bits Rx Subsys | 5 to 10 | 70-250 | Wireless Infrastructure | Multi(+3.3, +5), Single(+5) | 11-Bit, 1-Channel 20MSPS, or 2-Channel 10 MSPS Gain-Ranging ADC with RSSI | $38.96 | 11 | 2 | 20MSPS |
| AD9864 | IF-to-Bits Rx Subsys | 0.007 to 0.270 | 10-300 | Narrowband Radio, Portable & Mobile Radio | Single(+3), Single(+3.3) | 24-Bit Bandpass Sigma-Delta ADC/IF Digitizing Subsystem | $10.07 | 24 | 1 | 375kSPS |
| AD9874 | IF-to-Bits Rx Subsys | 0.007 to 0.270 | 10-300 | Narrowband Radio, Portable & Mobile Radio | Single(+3), Single(+3.3) | 24-Bit Bandpass Sigma-Delta ADC IF Digitizing Subsystem | $15.14 | 24 | 1 | 541.5kSPS |
| AD6650 | IF-to-Bits Rx Subsys | 3.5 | 70-300 | Wireless Infrastructure | Single(+3), Single(+3.3) | 16/24-Bit, 1 MSPS, Diversity IF-to-Baseband GSM/EDGE Narrowband Receiver | $20.64 | 24 | 2 | 1MSPS |
| AD9969 | Multi-Chan Bband CODEC |