AD9874: Low Power IF Digitizing Subsystem
The AD9874 is a general purpose IF subsystem that digitizes a low level 10-300MHz IF input signal with a bandwidth of up to 270 kHz. The signal chain of the AD9874 contains a low-noise amplifier, ...More
AD9874: Low Power IF Digitizing Subsystem
Product Description
The AD9874 is a general purpose IF subsystem that digitizes a low level 10-300MHz IF input signal with a bandwidth of up to 270 kHz. The signal chain of the AD9874 contains a low-noise amplifier, mixer, a band pass sigma-Delta analog-to-digital converter and a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit provides the AD9874 with 12 dB of continuous gain adjustment
The high dynamic range and inherent anti-aliasing provided by the bandpass sigma delta converter allows the AD9874 to cope with blocking signals 95 dB stronger than the desired signal. Auxiliary blocks include clock and LO synthesizers in addition to a serial peripheral interface port.
The SPI port programs numerous parameters of the AD9874, thus allowing the device to be optimized for any given application. Programmable parameters include synthesizer divide ratios, AGC attenuation and attack/decay time, received signal strength level, decimation factor, output data format, 16 dB attenuator, and the selected bias currents. The bias currents of the LNA and mixer can be further reduced at the expense of degraded performance for battery-powered applications.
Applications
- Multimode Narrow-Band Radio Products Analog/Digital UHF/VHF FDMA Receivers TETRA, APCO25, GSM/EDGE
- Portable and Mobile Radio Products
- Base Station Applications
- SATCOM Terminals
Features
- 10-300 MHz Input Frequency
- Baseband (I/Q) Digital Output
- 2.7-3.6 Supply Voltage
- 10-270 KHz Output Signal Bandwidth
- 8 dB SSB NF
- +1 dBm IIP3 (typ, max. bias)
- 95 dB Dynamic Range with 12 dB Continous AGC Range Enabled
- -18 or -30 dBm max IF Input
with AGC Disabled - LO and Clock Sampling Synthesizers
- Programmable Decimation Factor,
Output Format, AGC, and Synthesizer
settings - Simple Interface to DSP's such as ADI's Blackfin™
Diagrams
- Enlarge
- 原理图符号和PCB封装
Functional Block Diagram for AD9874
Low Power IF Digitizing Subsystem
Functional Block Diagram for AD9874
| Part# | RxTx Function | Channel BW MHz | IF or RF Range MHz | Primary Application | Supply V | Product Description | Price* (1000-4999) | Resolution (Bits) | # Chan | T-Put Rate |
|---|---|---|---|---|---|---|---|---|---|---|
| ADF9010 | Bband Quadrature CODEC | - | - | 900 MHz RFID readers | - | 900MHz ISM Band Analog RF Front End | - | - | 2 | - |
| AD9868 | Bband CODEC | - | - | Broadband Wireline, Home Networking | Multi(+3.3Anlg, +3.3Dig) | 10-Bit DAC/80 MSPS, 10-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | - | 10 | 1 | 80MSPS |
| AD9865 | Bband CODEC | 35 | DC-40 | Broadband Wireline, Home Networking | Single(+3.3) | 10-Bit DAC/80 MSPS, 10-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | $10.07 | 10 | 1 | 80MSPS |
| AD9869 | Bband CODEC | 54 | DC-40 | Broadband Wireline, Home Networking | Multi(+3.3Anlg, +3.3Dig), Single(+3.3) | 12-Bit DAC/80 MSPS, 12-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | $18.27 | 12 | 1 | 80MSPS |
| AD9866 | Bband CODEC | 35 | DC-40 | Broadband Wireline, Home Networking | Single(+3.3) | 12-Bit DAC/80 MSPS 12-Bit ADC, Mixed-Signal Front-End for Broadband Modem Applications | $18.77 | 12 | 1 | 80MSPS |
| AD9863 | Bband Quadrature CODEC | 25/40 | DC-40 | Broadband Wireless | Single(+3), Single(+3.3) | Dual, 12-Bit DAC/12-Bit 50/80 MSPS ADC, Mixed-Signal Front-End Processor (MxFE) For Bband Apps | $21.68 | 12 | 2 | 50MSPS |
| AD9861-50 | Bband Quadrature CODEC | 25 | DC-40 | Broadband Wireless | Single(+3), Single(+3.3) | Dual 10-Bit DAC/Dual 50 MSPS ADC Mixed-Signal Front-End (MxFE) For Broadband Comms Apps | $10.84 | 10 | 2 | 50MSPS |
| AD9861-80 | Bband Quadrature CODEC | 40 | DC-40 | Broadband Wireless | Single(+3), Single(+3.3) | Dual 10-Bit DAC/Dual 80 MSPS ADC Mixed-Signal Front-End (MxFE) For Broadband Comms Apps | $10.84 | 10 | 2 | 80MSPS |
| AD9862 | Bband Quadrature CODEC | 32 | DC-100 | Broadband Wireless | Single(+3.3) | Dual 14-Bit DAC/Dual 12-Bit ADC Mixed Sig Front-End (MxFE) for Bband Comms, Rx&Tx PGA, Digital SSB | $30.11 | 12 | 2 | 64MSPS |
| AD9860 | Bband Quadrature CODEC | 32 | DC-100 | Broadband Wireless | Single(+3.3) | Dual 12-Bit DAC/Dual 10-Bit ADC Mixed Sig Front-End (MxFE) for Bband Comms, Rx&Tx PGA, Digital SSB | $13.90 | 10 | 2 | 64MSPS |
| AD6600 | IF-to-Bits Rx Subsys | 5 to 10 | 70-250 | Wireless Infrastructure | Multi(+3.3, +5), Single(+5) | 11-Bit, 1-Channel 20MSPS, or 2-Channel 10 MSPS Gain-Ranging ADC with RSSI | $38.96 | 11 | 2 | 20MSPS |
| AD9864 | IF-to-Bits Rx Subsys | 0.007 to 0.270 | 10-300 | Narrowband Radio, Portable & Mobile Radio | Single(+3), Single(+3.3) | 24-Bit Bandpass Sigma-Delta ADC/IF Digitizing Subsystem | $10.07 | 24 | 1 | 375kSPS |
| AD9874 | IF-to-Bits Rx Subsys | 0.007 to 0.270 | 10-300 | Narrowband Radio, Portable & Mobile Radio | Single(+3), Single(+3.3) | 24-Bit Bandpass Sigma-Delta ADC IF Digitizing Subsystem | $15.14 | 24 | 1 | 541.5kSPS |
| AD6650 | IF-to-Bits Rx Subsys | 3.5 | 70-300 | Wireless Infrastructure | Single(+3), Single(+3.3) | 16/24-Bit, 1 MSPS, Diversity IF-to-Baseband GSM/EDGE Narrowband Receiver | $20.64 | 24 | 2 | 1MSPS |
| AD9969 | Multi-Chan Bband CODEC | 8 | DC-70 | Cable Modem/Set Top Box | Single(+3.3) |